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?2011 fairchild semiconductor corporation 1 www.fairchildsemi.com september 2011 fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch fdds100h06_f085 smart high side switch features ? short circuit protection ? current limitation ? thermal shutdown with restart. ? overvoltage protection(including load dump) ? very low standby current ? under voltage and over voltage shutdown with auto-restart and hysteresis. ? fast demagnetization of inductive loads ? open load detection in on-state ? cmos compatible input ? esd protection ? optimized static electromagnetic compatibility ? open drain fault output ? qualified to aec q100 typical applications ? power switch with diagnostic feedback for dc ground loads ? all types of resistive, inductive, and capacitive loads ? replace electromechanical relays, fuses and dis crete circuits description n channel power fet with charge pump, ground referenced cmos compatible input and diagnostic output with integrated protective functions. to252-5l 1 5 3 ordering information device package operating te mp. fdds100h06_f085 to252- 5l -40 ? c ~ 150 ? c
?2011 fairchild semiconductor corporation 2 www.fairchildsemi.com fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch block diagrams 3 5 vbb out sensefet load- current limiter charge pump load- current sensor temperature sensor output voltage detection control logic esd & overvoltage protection voltage source 1 gnd 2 4 in st undervoltage & overvoltage battery voltage sensor gate driver output clamp&gate protection pin definitions pin number pin name i/o pin function description 1 gnd p ground 2 in a input, activates the power switch in case of logic high 3 vbb p supply voltage; pin3 and tab are internally shorted 4 st a fault signal feedback; low on failure 5 out a output to loads
?2011 fairchild semiconductor corporation 3 www.fairchildsemi.com fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch absolute maximum ratings at tj=25? c unless otherwise specified. parameter symbol values unit supply voltage 1) v bb 37 v supply voltage for full s hor t circuit protection v bb 34 v load dump protection v loaddump = u a + v s , u a =13.5v r i =2 ? , r l =12 ? , t d =400ms, in=low o r high v loaddump 2) 60 v load current (short-circuit current) 3) i l self-limited v operating temperature range storage temperature range t j t stg -40 ~ 150 -55 ~ 150 ? c ? c power dissipation(dc) tc ? 25 c p tot 41.6 w inductive load switch-off energy dissipation 4) single pulse, i l = 2.67a, l=100mh, v bb =12v, t j =150? c e as 0.425 j electrostatic discharge capability (esd) hbm (human body model) v esd 4 kv cdm (charged device model) 2 kv input voltage (dc) v in -0.5 .... + 5.4 v current through input pin(dc) current through status pin(dc) i in i st +/-2 +/-5 ma note: 1) see also on page 04. 2) vload dump is setup without the dut connected to the generator. 3) see also diagram on page 05. 4) not subject to production test, specified by design. see also on page 10.
?2011 fairchild semiconductor corporation 4 www.fairchildsemi.com fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch electrical characteristics at tj=25? c, v bb =12v unless otherwise specified. parameter symbol conditions min. typ. max. unit theramal char ac teristics thermal resistance r thjc r thja (junction to case) mini. footprint (junction to ambient) 1 inch^2 device on pcb 1) - - - - 99 35 3 45 k/w load switching capability and characteristics on-state resistance(pin3 to pin 5) r on v in =5v, vbb=12v, i l =2.5a tj=25 ? c v in =5v, vbb=12v, i l =2.5a tj=150 ? c - 80 160 100 200 m ? nominal load current( tab to pin5) i l(nom) smd 1) von<= 0.5v, t a =85 ? c, t j <=150 ? c 2.8 3.0 - a turn-on time ( to 90% v out) turn-off time ( to 10% v out) t on t off r l =12 ??? t j = -40~ 150 ? c r l =12 ??? t j = -40~ 150 ? c 24 10 70 66 170 170 us slew rate on (10% to 30% v out ) dv / dt on r l =12 ??? t j = -40~ 150 ? c 0.2 0.8 1.5 v/us slew rate off (70% to 40% v out ) -dv / dt off r l =12 ??? t j = -40~ 150 ? c 0.2 0.8 3 v/us operating parameters operating voltage v bb(on) t j = -40~ 150 ? c 5.5 - 37 v over voltage shutdown v bb(sd) t j = -40~ 150 ? c 38 43.5 48 v over voltage restart v bb(re) t j = -40~ 150 ? c 37.5 - - v over voltage hysteresis v bb(hys) t j = -40~ 150 ? c - 0.5 - v under voltage shutdown 2) v bb(u) t j = -40~ 150 ? c 2.5 3.5 - v under voltage restart v bb(u rst) t j = -40~ 150 ? c - 4.2 5.2 v under voltage restart of charge pump v bb(ucp) t j = -40~ 150 ? c 5 5.5 v overvoltage protection 3) v bb(az) i bb =40ma, t j =-40 ~ 150 ? c 49 54 62 v standby current i bb(off) v in =0, t j = -40~ 150 ? c - 4.8 15 ua leakage output current i l(off) v in =0, t j = -40~ 150 ? c - - 15 ua operating current 4) i bb(gnd) v in =5v, t j = -40~ 150 ? c - 0.5 2.0 ma note: 1) device on76.2mm * 114mm * 1.57mm glass epoxypcb fr4 with 1inch^2(one layer 70um) copper area. still air condition. 2) refer to page 13.should reset in to restart in case battery voltage comes back to normal operating range after undervoltage sh utdown. 3) see also von(cl) in tabel of protection functions and circuit diagram on page 14. 4) add i st , if i st >0, and add i in , if v in > 5.5v
?2011 fairchild semiconductor corporation 5 www.fairchildsemi.com fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch electrical characteristics at tj=25? c, v bb =12v unless otherwise specified parameter symbol conditions min. typ. max. unit protection functions 1) short circuit current limit (pin3 to pin 5) v on > v on(sc) i l(scp) t j =-40? c t j =25 ? c t j =150 ? c 9 7 4 15 12 7 24 19 10 a short circuit detection voltage v on(sc) - 4 - v short circuit shutdown delay time t d(sc) t j =-40 ? c ~ 150 ? c minimum input low time : 60us 80 250 530 us output clamp(inductive load switch off) at v out = vbb-v on(cl) (overvoltage) 2) v on(cl) i l =40ma t j =-40 ? c ~ 150 ? c 50 56.5 63 v thermal overload trip temperature t jt 150 170 - ? c thermal hysteresis ? t jt v in =5v - 10 - k reverse battery voltage 3) -v bb - - 32 v diagnostic characteristics open load detection current i l(ol ) v in =5v,t j =-40 ~ 150 ? c 12 - 480 ma input & status feedback 4) input resistance r i t j =-40 ~ 150 ? c 2.4 3.0 3.6 k ? input turn-on threshold voltage v inh t j =-40 ~ 150 ? c - 2.2 2.9 v input turn-off threshold voltage v inl t j =-40 ~ 150 ? c 1.2 - - v off state input current i in(off ) v in =0v, t j =-40 ~ 150 ? c - - 1 ua on state input current i in(on ) v in =3.5v, t j =-40 ~ 150 ? c 20 45 70 ua initial open load delay time t d(st) t j =-40 ~ 150 ? c - 380 750 us delay time for status with open load while o n 5) t d(on_ol) normal --> open load, t j =-40 ~ 150 ? c 10 30 90 us delay time for status with open load while o n t d(on_nor) open load --> normal, t j =-40 ~ 150 ? c 10 30 90 us status output(open drain) for high level v sth i st =1.6ma, t j =-40 ~ 150 ? c 5.4 6.3 - v status output(open drain) for low level v stl i st =1.6ma, t j =-40 ~ 150 ? c 0.6 v notes: 1) integrated protection functions are designed to prevent ic destruction under fault conditions described in the data sheet. f au lt conditions are considered as "outside" normal operating range. protection functions are not designed for continuous repetitive operation. 2) see the page12 3) requoired 150 ? resistor in gnd pin. note that the power dissipation is higher compared to normal operation condition due to the voltage drop across the intrinsic drain- source diode. the temperature protection is not active during reversrse current operation. in and st currents have to be limitt ed by max rating. 4) if a ground resistor r gnd is used, add the voltage drop across this resistor. 5) guaranteed by design.
?2011 fairchild semiconductor corporation 6 www.fairchildsemi.com fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch application information 1. truth table sense current under fault conditions input level output level status normal operation l h l h h h open load l h x1) h h l short circuit to vbb l h h h l 2) h (l 3) ) short circuit to gnd l h l l h l 4) overtemperature l h l l l l undervoltage l h l l h h (l 5) ) overvoltage shutdown l h l l h h l = ? low ? level, z = high impedance, potential depends on external circuit, h = ?high? level notes: 1) power tr off, high impedance. 2) an short of output to vbb ,in the off state, causes an internal current from output to ground. if rgnd is used, an offset vo lt age at the gnd and st pins will occure and v stl signal may be errorious. 3) low resistance to vbb may be detected in on-state by the no-load-detection. 4) latched and reset by input. low resistance to vbb may be detected in on-state by the no-load-detection. 5) should reset in to restart in case battery voltage comes back to normal operating range after undervoltage shutdown and sta tus = ?lo w? level. 2.terms r gnd gnd in out v bb v bb v in i l v out i gnd v st i in i st v o n i bb st notes:
?2011 fairchild semiconductor corporation 7 www.fairchildsemi.com fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch 3. detailed function blocks 3.1 input circuit (esd protection) v zi2 r i v zi1 gnd in v zi1 = 16v (typ.), v zi2 = 6.1v (typ.). r i =3k. 3.2 status output st d z,st gnd 5v i st v d z,st = 6.1v (typ.), max 5ma. with i st =1.6ma. low level of st is 0.6(max). 3.3 inductive and overvoltage output clamp v z1 v bb out v on v on is clamped to v on(cl) =59v(typ). 3.4 overvoltage and reverse battery protection r gnd r i v zi2 gnd in logic vbb v bb(az) st d z,st r in r st v zi1 r i v zi2 gnd in logic vbb v bb(az) st d z,st r in r st schottky diode v zi1 v dz,st =6.1v(typ), v zi1 = 16v (typ.), v zi2 = 6.1v(typ). r gnd = 150 ? typ.vbb(az) = 54v(typ).
?2011 fairchild semiconductor corporation 8 www.fairchildsemi.com fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch 3. 5 open load detection. detection logic v bb out v on open load is detected when in=h and v on < ron * i l(ol) . 3. 6 short circuit detection. detection logic v bb out v on short circuit is detected when v on > 4v.(typ) and t > t( dsc ), typically 250us. 3.7 vbb disconnect with energized inductive load gnd in out v bb v bb st gnd in out v bb v bb st v in v st i in i st schottky diode and gnd disconnect nominal load current can be handled by the device itself. 3.8 inductive load switch-off energy dissipation gnd in out v bb i l(t) = l r l e r e l e load e as v bb z l { st
?2011 fairchild semiconductor corporation 9 www.fairchildsemi.com fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch energy stored in load inductance: e l 12 ? li l 2 ?? = while demagnetizing load inductance, the energy dissipated in mosfet is e as e bb e l e r ?+ v ? on cl ?? i l t ?? dt ? == with an approximate solution for rl > 0 : e as i l l ? 2r l ? -------------- - v on cl ?? ?? 1 i l r l ? v out cl ?? ----------------------------- + ?? ?? ln =
?2011 fairchild semiconductor corporation 10 www.fairchildsemi.com fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch 3.9 maximum allowable load inductance for a single switch off 11 01 0 0 0.01 0.1 1 10 100 1000 i_l[a ] l[mh] l=f(i l ) ; t j,start = 150 ? c, vbb=12v, r l = 0 ?
?2011 fairchild semiconductor corporation 11 www.fairchildsemi.com fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch typical application circuit m r gnd 150 ? gnd st out v bb i l i gnd i bb in 6.8k 5.1 zener bat mcu 10k 2k diag 5v 2k m r gnd 150 ? gnd st out v bb i l i gnd i bb in 6.8k 5.1 zener bat 10k 2k sw1 2k
figure 1. vbb turn-onswitching a lamp figure 2a. switching motors and lamps figure 2b. switching an inductive load figure 3. turn-on into short circuit in case of v on > v on(sc) (typ.4v) the device will be switched off by internal short circuit detection in vbb v out st t d(bbin) t t t t i in i l v out st t t t t in i l v out st v on(cl) t d(st) i l(ol) t t t t t d(sc) in i l v out st ?2011 fairchild semiconductor corporation 12 www.fairchildsemi.com fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch timing diagram
in i l v out st t d(st) in i l v out st t d(on_ol) t d(on_nor) normal normal open figure 4a. open load detection while being open figure 4b. open load detection while turning-on figure 5a. undervoltage in vbb v out st v bb(u) v bin(u cp) v b(u rst) in vbb v out st v bb(u) v b(u rst) ?2011 fairchild semiconductor corporation 13 www.fairchildsemi.com fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch figure 5b. undervoltage restart of charge pump
figure 6. overvoltage in vbb v out st v bb(re) v on(cl) v bb(sd) figure 7. over temperature in st v out t j ?2011 fairchild semiconductor corporation 14 www.fairchildsemi.com fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch
?2011 fairchild semiconductor corporation 15 www.fairchildsemi.com fdds100h06_f085 rev. 1.0.0 fdds100h06_f085 smar t high side switch
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